Current position

I am currently working at École Centrale de Nantes - LS2N as a temporary teaching and research fellow.

Most of the teaching I am in charge of is part of the engineer training ITII-SEC (Communicating Embedded System).

For the research part, i am currently working in the field of games theory, in particular focusing on weighted timed games. Some ongoing work in collaboration with Didier Lime will be soon published.

Post-Doc (2022-2023)

During one year I had the opportunity to work as a post-doc with Kostis Sagonas and Bengt Jonsson at Uppsala University. This work is part of the aSSIsT project which focuses on cybersecurity for the IoT.

Our goal was to find memory related vulnerabilities in communication protocol implementations (with a particular focus on DTLS). To do so we apply a testing technique called fuzzing, which consists in providing random inputs to the system under test until a bug occurs.

Communications protocols have the specificity to (generally) implement state machines. We propose to exploit this particularity by driving our fuzzing with a state-aware approach. First we build a state machine of the system under test with a model learning technique. Then we generate concrete inputs for the system under test that cover all the states of the state machine. The concrete inputs are then used to replace the system in each state and to start the fuzzing from there.

This work is still ongoing, but should be soon released. We developped a tool, a fuzzer called AFL-ML (based on AFLNet). We also developped a experimental environment and benchmark with several implementations of DLTS and EDHOC, in order to compare with the state of the art tools.

PhD thesis (2019-2022)

I had the chance to do my PhD thesis under the joint direction of Olivier H. Roux, Mikaël Briday and Malek Ghanes at LS2N, École Centrale de Nantes. This work started on October 2019 and finished it on November 2022.

The objective was to be able to automatically generate a circuit (described in VHDL) performing an algorithm described in Simulink, with a specific FPGA target. This circuit must meet time (maximal critical path) and resource (maximal logical units) constraints. The thesis was part of a collaboration with the automotive company Renault.

This work introduces new methods for the optimization of pipeline synthesis and to allow circuit folding (or time-multiplexing). It was also an opportunity to contribute in the field of formal methods. We have been led to design a new model of Petri Net with time, with the specificity of having transitions that can wait to fire (delayable) and a synchronous firing (maximal step semantics). After playing with it for some time, this model turned out to be very interesting on its own! (some nice expressivity results here)

Master thesis (2019)

I had the opportunity to work under the supervision of Didier Lime for master thesis at LS2N, École Centrale de Nantes. We carried out some works on weighted timed Automata and Games. This led to an algorithm to compute optimal reachability in weighted timed Automata, based on a backward symbolic exploration.